Computer architecture regards the basic structure of a computer from the standpoint of what exactly can be performed by code written for the computer. Ordinarily, architecture is defined by the number of registers in the Central Processing Unit (CPU), the logic operations performed by the Arithmetic and Logic Unit (ALU), etc. Usually, the architectural definition is expressed as an instruction set and its related elaboration. Some computer architectures have been founded on reduced instruction sets to provide performance advantages. Complex Instruction Set Computer (CISC) processors and Reduced Instruction Set Computing (RISC) processors are two examples of such.
RISC processors have an architecture based on simplified instructions capable of providing higher performance due to faster execution of each instruction. The general concept is that RISC processors use a small, highly-optimized set of instructions, rather than a more specialized set of instructions often found in other types of architectures. RISC processors use a load/store architecture that allows memory to be accessed by load and store operations with all values for an operation being loaded from memory and present in registers. After the operation, the result is stored back to memory.
CISC processors, on the other hand, are generally characterized as having a larger number of instructions in their instruction set, often including memory-to-memory instructions with complex memory accessing modes. The instructions are usually of variable length, with simple instructions being only perhaps one byte in length with complex instructions being in the dozens of bytes in length. The size of an operand specifier generally depends upon the addressing mode, etc. The first byte of the operand specifier describes the addressing mode for that operand, while the opcode defines the number of operands. When the opcode itself is decoded, the total length of the instruction is not yet known to the processor because the operand specifiers have not yet been decoded.
One advantage of CISC processors lies in the source code that generally result in more work being done by the processor for each line of code. But, this comes at the expense of execution time, more so when pipelining of instruction execution is necessary to achieve desired performance levels. The advantage of RISC processors, therefore, lies in the speed of execution of code, although less is accomplished by each line of code.